Products
Wireless RF
Semtech SX1303CTSXXXGW1
LoRa® Corecell Gateway Reference Design for Fine Timestamp Based on SX1303 for LoRa Core™
The LoRa® Corecell gateway Fine Timestamp reference design is a complete indoor and outdoor gateway turnkey solution reference design provided for US, EU and China ISM bands. The reference design is based on SX1303.
Overview
Features
- Fine Timestamp
- 10x power reduction compared to legacy products
- Maximum TX output power (CN490) = +17dBm
- Maximum TX output power (EU868/US915) = +27dBm
- Receive 8 LoRa channels multi-data rates (SF5 ~ SF12 / 125 simultaneously kHz) + 2 mono-data rate (LoRa 250/500kHz and FSK 50kbps)
- Typical sensitivity level (CN490):
- -141dBm at SF12 BW 125kHz
- -12dBm at SF7 BW 125kHz
- -110dBm at FSK 50kbps
- Typical sensitivity level (EU868/US915):
- -140dBm at SF12 BW 125kHz
- -125dBm at SF7 BW 125kHz
- -110dBm at FSK 50kbps
Applications
- Home automation
- Building automation
- Factory automation
Datasheets and Resources
Application Notes
- Corecell ref design for FineTimeStamp gateway (USB version) performance report for China
- Corecell ref design for FineTimeStamp gateway (USB version) performance report for Europe
- Corecell ref design for FineTimeStamp gateway (USB version) performance report for US