ACS8947T: Jitter Attenuating, Multiplying Phase-Locked Loop with Automatic Input Switch and Data Resynchronization Path
The ACS8947T JAM PLL is a general pupose, Integer N, jitter-attenuating, differential phase-locked loop for generating low jitter output clocks.
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Use our new tool to determine a configuration of the ACS8947T that will perform your frequency translation. |
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- Highly configurable high performance Integer N PLL with integrated VCO.
- VCO frequency range 2.35 GHz to 2.9 GHz.
- Configurable closed loop bandwidth from 2 kHz upwards.
- PLL fully configured by hardwired configuration matrix: no requirement for an external microprocessor.
- Full control over internal dividers allows the device to be configured for a wide range of frequency translation and jitter cleaning applications.
- Meets RMS jitter requirements for OC3 and OC12 telecommunications systems.
- Wide input frequency range of 580 kHz to 180 MHz.
- Wide output frequency range of 1.23 MHz to 625 MHz.
- Input activity monitors and lock detector.
- Automatic or manual control of reference selection.
- External feedback option.
- Wide tracking range of 200 ppm.
- Powerful evaluation board and GUI tool for configuration and device assessment.
- 3.3 V operation: temperature range - 40°C to +85°C.
- Small outline, leadless, 7 mm x 7 mm QFN48 package.
