Printed Circuit Board Protection Design Guidelines for ESD Suppression
Current is induced into any loop that encloses a changing magnetic flux. The magnitude of the current will be proportional to the size of the loop. Larger loops enclose more flux and thus higher currents are induced in the circuit. Therefore it is important to minimize loop areas when considering circuit board protection.
Long signal traces will act as antennas to receive energy from fields that are produced by the ESD pulse. By keeping line lengths as short as possible, the efficiency of the line to act as an antenna for ESD related fields is reduced.
A direct ESD discharge into the ground plane can cause damage to sensitive circuits. One or more high frequency bypass capacitors along with a TVS diode should be placed between the power and ground of vulnerable components. The bypass capacitors serve to reduce charge injection and thus the voltage differential between power and ground. The TVS diverts induced currents and maintains the voltage differential at the level of the clamping voltage of the TVS. The TVS and capacitors should be placed as close as possible to the protected IC.
You can find more information and additional guidelines for circuit board protection in the application note linked below.
> Download our "PCB Design Guidelines for ESD Suppression" application note

